首页|VHDL Algorithm of A (255,223) RS Encoder

VHDL Algorithm of A (255,223) RS Encoder

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Accuracy of transferred information in some communication system is very critical。 To get low error code rate， transferred codes must be encoded by some error correction methods such as error correction and resend， Forward Error Correction(FEC)， feedback and verifying。 But Forward Error Correction(FEC) that can lower the probability of error and increase transmission distance is widely used。 Reed-Solomon(RS) code is a block FEC that can correct multiple errors， specially correcting bursting errors。 RS code has been used in many fields， such as wireless communication and satellite communication system。 This paper presents two kinds of optimizing VHDL algorithm of military RS(255， 223) encoder， then VHDL program are downloaded into a FPGA chip to verify the designed algorithm。 At last its function and performance are evaluated in a device of military satellite data transmission。

reed-solomon codeVHDLalgorithmFPGA

Yunhui Liu、Yuhang Yang

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Great Wall Lab. of Modern Communication Institute, Shanghai Jiaotong University, Huashan Road 1954 Shanghai., 200030, P.R. China

5th International Symposium on Test and Measurement (ISTM/2003) Vol.6

Shenzhen(CN);Shenzhen(CN)

5th International Symposium on Test and Measurement (ISTM/2003) Vol.6 Jun 1-5, 2003 Shenzhen, China

p.4947-4950

2003