首页|Enhancing analog yield optimization for variation-aware circuits sizing

Enhancing analog yield optimization for variation-aware circuits sizing

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This paper presents a novel approach for improving automated analog yield optimization using a two step exploration strategy。 First, a global optimization phase relies on a modified Lipschitizian optimization to sample the potential optimal sub-regions of the feasible design space。 The search locates a design point near the optimal solution that is used as a starting point by a local optimization phase。 The local search constructs linear interpolating surrogate models of the yield to explore the basin of convergence and to rapidly reach the global optimum。 Experimental results show that our approach locates higher quality design points in terms of yield rate within less run time and without affecting the accuracy。

OptimizationLinear programmingMathematical modelConvergenceComputational modelingData modelsSearch problems

Ons Lahiouel、Mohamed H. Zaki、Sofiène Tahar

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Dept. of Electrical and Computer Engineering, Concordia University, Montréal, Québec, Canada

Design, Automation & Test in Europe Conference & Exhibition

Swisstech(CH)

Proceedings of the 2017 Design, Automation & Test in Europe

1273-1276

2017