首页|Dynamic Gate Drive for SiC Power MOSFETs with Sub-nanosecond Timings

Dynamic Gate Drive for SiC Power MOSFETs with Sub-nanosecond Timings

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A dynamic gate driving strategy is proposed to control the turn-off $\boldsymbol{dV}_{\boldsymbol{DS}}/\boldsymbol{dt}$ transients for SiC power MOSFETs。 Compared with a conventional gate driver with fixed gate resistance, dynamic gate drive can effectively suppress the VDS overshoot without a significant reduction in switching speed or increase in turn-off loss。 In double pulse testing, using a 40 A, 1200 V SiC power MOSFET, the dynamic gate driver exhibits a 78% reduction in turn-off energy loss $(\boldsymbol{E}_{off})$ when compared to a conventional gate driver for a 35% overshoot。 Moreover, it is also found that SiC power MOSFETs require much more stringent timing resolution ($\boldsymbol{dV}_{\boldsymbol{DS}}/\boldsymbol{dt}$。 This paper demonstrates and analyzes the advantages of dynamic gate driving for SiC power MOSFETs with precision timing。

Insulated gate bipolar transistorsMOSFETSilicon carbideSwitchesLogic gatesGate driversTiming

Rophina Li、Zhaozheng Hou、Tiantian Liu、Mohamed Elshazly、Sut Leung、Xingqiang Peng、Wai Tung Ng

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The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada

Huawei Digital Energy Technology Co, Shenzhen, China

State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, China

IEEE Applied Power Electronics Conference and Exposition

Orlando(US)

2023 IEEE Applied Power Electronics Conference and Exposition

324-330

2023