Research and Implementation of an Active Self-Reconfiguration Mechanism for Array Processors
The complex computational requirements of high efficiency video coding technology result in prolonged processing time,adversely affecting real-time performance and overall efficiency of the hardware processing.Reconfigurable computing technology,capable of adapting to complex computational demands in video algorithms through reprogramming,facilitates algorithm iteration and optimization,thereby can improve efficiency.However,the traditional approach of implementing dynamic reconfiguration on a host computer suffers from issues such as long reconfiguration time and low reconfiguration efficiency,which constrains the performance enhancement of reconfigurable architectures.In order to reduce the reconfiguration time and accelerate the hardware reconfiguration process,an active self-reconfiguration method driven by instruction flow is proposed.The method fully utilizes the rich processing element resources of the reconfigurable array,autonomously monitors the execution state of the array through the processing element,and autonomously realizes functional reconfiguration according to the monitoring results.The experimental results show that compared with traditional centralized control reconfigurable array processors,the dynamic reconstruction process of deblocking filtering improves calculation speed by 25％ and reduces configuration time by 27％ .
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