Optimal design of convolutional data reuse based on dynamically reconfigurable structures
Aiming at the problems of low computational efficiency,slow speed and high consumption of hardware resources of convolutional neural network (CNN ),an optimal design scheme of convolutional data multiplexing based on dynamic reconfigurable structure is proposed.The reconfigurable array critical interconnect registers are used to implement data multiplexing of input feature map data and weight data to improve memory access efficiency,and uses inter-layer multi-channel parallel computing to accelerate the convolutional computation of the neural network.Tested on the AlexNet,the proposed data multiplexing strategy can reduce the convolutional computation by up to 44.05％.The proposed optimization scheme is implemented on a Zynq-7000 development board.Results show that this experiment consumes 12.86％ less LUTs resources,approximately 97.5％ less FF resources and approximately 66.7％ less DSP resources than existing field programmable gate array(FPGA)-based implementations of AlexNet computations.
万方数据
维普
