Abstract
Combining two-dimensional materials and high-k gate dielectrics offers a promising way to enhance the device performance of tunneling field-effect transistor(TFET).In this work,the device performance of WSe2/SnSe2 TFET with various gate dielectric materials is investigated based on quantum transport sim-ulation.Results show that TFETs with high-κ gate dielectric materials exhibit improved on-off ratio and enhanced transconductance.The optimized WSe2/SnSe2 TFET with TiO2 gate dielectrics achieves an on-state current of 1560 μA/µm and a subthreshold swing(SS)of 48 mV/dec.The utilization of high-κ gate dielectric materials results in shorter tunneling length,higher transmission efficiency,and increased elec-tron tunneling probability.The performance of the WSe2/SnSe2 TFET would be affected by the presence of the underlap region.Moreover,WSe2/SnSe2 TFETs with La2O3 dielectric can be scaled down to 3 nm while meeting high-performance(HP)device requirements according to the International Technology Roadmap for Semiconductors(ITRS).This research presents a practical solution for designing advanced logic devices in the sub-5 nm technology node.
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