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基于FPGA的中值滤波算法的改进及实现

Improvement and Implementation of FPGA-based Median Filtering Algorithm

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针对一般的中值滤波算法处理速度慢、排序量大和效果模糊等问题,在十字型快速中值滤波算法的基础上,提出了一种加入阈值比较且具有更高处理速度和更好处理效果的改进算法,并在 FPGA 硬件平台上实现了此算法.最后对实验结果进行了对比,证明了改进的快速中值滤波算法具有比较次数少、占用硬件资源少和图像细节得到更好保护等优点,处理效果达到了图像预处理对实时性的技术要求.
Aiming at addressing sluggish processing,excessive arithmetic operation for sequencing,and poor details with respect to the currently prevailing median filtering algorithms,this work made an attempt to design an improved cross-type fast median filtering algorithm with the features of threshold-based comparison,higher processing speed,and better performance,and to implement it on the FPGA hardware platform.The improved algorithm was proved by a comparative experiment to have many advantages such as fewer comparison times,less hardware resources utilization,and better re-tention of image details,and to achieve a processing utility technically adequate for real-time image preprocessing.

fast median filteringFPGAcomparison of threshold

李春辉、史文

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许昌职业技术学院信息工程学院,河南 许昌 461000

快速中值滤波 FPGA 阈值比较

2024

电工技术
重庆西南信息有限公司(原科技部西南信息中心)

电工技术

影响因子:0.177
ISSN:1002-1388
年,卷(期):2024.(19)