Design of Synchronous Triggering Device Based on CPLD+STM32F1
In the field test,the equipment is located in three different positions and far away.The synchronous triggering device was designed based on the requirement for synchronous triggering of remote joint debugging equipment in actual measurements.The host computer controled the synchronous triggering device through a USB data cable.The CPLD+STM32F1 was chosen as the control chip,and the CoreStar UM220-Ⅲ L dual-mode high-performance timing module was used as the time synchronization reference,and a suitable high-precision crystal oscillator was used as the internal clock source,which ensured high-precision trigger control.The essay describes in detail the hardware and software design of the synchronization trigger device.The device is compact,convenient and accurate.The synchronous triggering device receives instructions from the host computer through the USB port,and the STM32F1 processes the instructions and takes corre-sponding actions.The CPLD (Programmable Logic Device)has powerful logic and timing functions,which can be easily programmed and debugged in the system to complete the output of predetermined waveforms.Online simulation confirmed that the synchronous triggering device has strong synchronization and accuracy of millisecond level.
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