An all silicon carbide integrated process platform based on the wafer with N-substrate and P-epitaxy is pro-posed in this paper,which is compatible with CMOS (Complementary Metal Oxide Semiconductor field-effect transistor) devices,LDMOS (Laterally-Diffused MOS) and high-voltage diodes. A P-buffer layer is adopted to modulate the vertically distributed electric field and potential,which results in 212.4％ improvement in vertical voltage withstanding. The LDMOS,high voltage diode and high side region can achieve more than 300 V breakdown voltage in 2 µm P-type epitaxial layer. Based on this platform,SiC (Silicon Carbide) CMOS inverter and inverter chain are constructed,all of which achieve volt-age output ranging from 0～20 V with rail-to-rail capability. A half-bridge driving circuit is designed with a four-stage invert-er chain as the low-side driver circuit. The high-side driver circuit consists of level-shifting circuit and a high-side region in-verter chain circuit,producing an output of 180～200 V floating gate drive signal.
万方数据
维普
