In this paper,the design of high-voltage super junction power MOS (Metal Oxide Semiconductor) de-vice is carried out by using the semi-super junction structure,the super junction cell structure is designed based on the Sentaurus TCAD (Technology Computer Aided Design) simulation platform,and the breakdown voltage and on-resis-tance of the high-voltage super junction power MOS devices are optimized,and then the characteristics of parasitic ca-pacitance are explored. Finally,based on multiple epitaxial processes,a high-voltage super junction power MOS device with a simulated breakdown voltage of 1658 V,a process simulation breakdown voltage of 1598 V and a specific on-resistance value of 303 mΩ·cm2 has been independently designed,which reduced the specific on-resistance value by about 50％ compared with the same withstand voltage device. At the same time,the influence of four main structural pa-rameters,namely super junction doping concentration and thickness and voltage support layer doping concentration and thickness,on the parasitic capacitance characteristics of the device has been explored.
关键词
超结VDMOS/元胞/击穿电压/比导通电阻/寄生电容
Key words
super junction VDMOS/cell/breakdown voltage/specific on-resistance/parasitic capacitance
维普
万方数据