Efficient Implementation of National Security Algorithms SM2,SM3 and SM4 Based on RISC-V Instruction Extension Method
The implementation of the cryptographic algorithm based on instruction extension is a lightweight scheme that balances both performance and area,which is especially suitable for the increasingly popular Internet of Things devices.The proposal of national cryptographic algorithms such as SM2,SM3,and SM4 is conducive to improving the security of self-controlled devices.However,the relevant research on instruction extensions for these algorithms is insufficient.RISC-V has become one of the most popular instruction set architectures due to its advantages of open source,simplicity,extensi-bility,etc.This paper mainly focuses on the instruction extensions and efficient implementation of the SM2,SM3,and SM4 algorithms based on a domestic open-source RISC-V processor.Specifically,this paper proposes an overall instruction ex-pansion scheme based on the concept of hardware-software co-design;this paper conducts an in-depth analysis of the relat-ed cryptographic algorithms and comparison of the implementation schemes and then proposes efficient implementations of the hardware units,respectively.This paper designs and implements a coprocessor with a two-stage pipeline structure,se-quential dispatching,out-of-order execution,and sequential write-back instruction execution modes,as well as an indepen-dent memory access unit and a large bit-wide register.The coprocessor takes over part of the control logic of the crypto-graphic algorithm,reducing hardware resource consumption.The experimental results show that the hardware structure of the cryptographic coprocessor designed in this paper is simplified,and the utilization of hardware resources is high.SM2,SM3,and SM4 algorithms occupy very few resources,but the execution rate decreases only to a certain extent compared with pure hardware implementation.The product of resource area and time spent has varying degrees of advantages com-pared to other relevant literature.
RISC-Vco-processorsnational cryptographic algorithminstruction extensionshummingbird E203embedded system
万方数据
维普
