A Design of 2-Stage Voltage Ramp-Up SRAM Physical Unclonable Function

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外文摘要：Silicon physical unclonable function(PUF)implemented by static random access memory(SRAM)exists inherent demerit of unstable cells due to noise of environment and circuits,which significantly restricts its re-producibility.In this paper,a 16T SRAM cell with reset-delay circuit and a 2-stage voltage ramp up is fabricated and reported.Compared to conventional SRAM structure,each PUF cell adds a pair of pull-up PMOS(P-channel metal oxide semiconductor)and pull-down NMOS(N-channel metal oxide semiconductor)controlled by reset and delayed-reset signals respectively,resulting in two positive feedback stages with different amplification coefficients when the voltage is ramped up.PUF array consists of 4064 cells,322 dummy cells and a group of 8 series-connected inverters with an area of 304 μm × 650 μm to match the digital post-processing module.PUF test chip was fabricated in HH-Grace 110 nm platform with total area 1140 × 1140 μm2.The average HDintra(intra-chip Hamming distance,also bit error rate,BER)and HDinter(inter-chip Hamming distance)values of the 50 PUF chips in SOP16 package mea-sured at normal point(1.5 V/25 ℃)were 1.92％and 49.85％,respectively.

外文关键词：

Physical unclonable functionStatic random access memoryIntegrated circuits

作者：

Minte SONG、Nan LIU、Shuaiyang ZHOU、Zhengguang WANG、Zhanqiang RU、Peng DING、Wei HUANG、Helun SONG

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作者单位：

School of Nano-Tech and Nano-Bionics,University of Science and Technology of China,Hefei 230026,China

Suzhou Institute of Nano-Tech and Nano-Bionics,Chinese Academy of Sciences,Suzhou 215123,China

基金：

Vacuum Interconnected Nanotech Workstation(Nano-X)Key Research and Development Program(Social Development)of Jiangsu Provincethe"Six talent peak"Highlevel Talent Project of Jiangsu Province,China

项目编号：

2018-000052-73-01-000356BE2021667XYDXX-211

出版年：

2024

DOI：

10.23919/cje.2022.00.406

电子学报(英文)

CSTPCDEI

ISSN：1022-4653

年,卷(期)：2024.33(2)

参考文献量36