采用多级噪声抵消技术的CMOS全差分LNA设计
CMOS fully differential LNA design with multi-grade noise cancellation technology
姚春琦 1毛陆虹 1张世林 1谢生1
作者信息
- 1. 天津大学电子信息工程学院,天津300072
- 折叠
摘要
设计了一种用于2.4GHz RFID单芯片阅读器的CMOS低噪声放大器(LNA).该设计采用全差分共源共栅结构和新颖的多级噪声抵消技术,不仅减小了电路的噪声而且增加了系统的线性度.芯片采用标准UMC 0.18um CMOS工艺,工作电压为1.2V时,消耗电流小于8mA,后仿真结果表明2.4GHz时,芯片达到1.69dB噪声系数,大于14.25dB功率增益以及-1.1dBm的输入三阶截点(ⅡP3).设计满足单芯片阅读器低噪声,低功耗和高线性度的要求.
Abstract
A 2.4 GHz CMOS low noise amplifier (LNA) is presented for the use of single-chip RFID reader.The design uses a fully differential cascode structure and a novel multi-stages noise cancellation technology,not only reducing noise but also increasing linearity of the system.The chip uses a standard UMC 0.18um CMOS process,when working at 1.2V,the current consumption is less than 8mA,post-simulation result shows that:working at 2.4GHz,we get 1.69dB noise figure,larger than 14.25dB power gain and-1.1 dBm input third-order intercept point (ⅡP3).This design meets the requirements of single-chip reader:low noise,low power consumption and high linearity.
关键词
低噪声放大器/噪声消除技术/线性度改善技术/CMOS射频集成电路Key words
low-noise amplifier/noise cancellation technology/linearity improvement techniques/CMOS radio frequency integrated circuits引用本文复制引用
出版年
2013
NETL
NSTL
维普
万方数据