一种占空比可调的两相非重叠时钟发生器
A two-phase non-overlapping clock generator with adjustable duty cycle
张学敏 1王卫东1
作者信息
- 1. 桂林电子科技大学信息与通信学院,广西桂林541004
- 折叠
摘要
本文通过调谐压控振荡器输出信号的占空比,直接产生了两相非重叠时钟信号.这一设计集振荡信号发生与非重叠时钟产生于一身,突破了传统标准电路的设计思路.本项工作获得了20％～80％的信号占空比可调范围,同时还实现了两相信号之间不重叠时间间隔的可调谐.利用SMIC 0.18.μm lP6M CMOS工艺,所需电源电压为1.8V,整个电路仅需30个晶体管.
Abstract
A two-phase non-overlapping clock generator from duty cycle adjustable CMOS voltage controlled oscillator (VCO) is proposed.This circuit combines oscillator signal generation and non-overlapping clock which is different from conventional standard circuit.Fabricated in SMIC 0.18μm 1P6M CMOS process with 1.8V supply voltage,a pair of two-phase non-overlapping clock signals may be obtained with tunable duty cycle range from 20％ to 80％.The non-overlapping time between the two clock signals is adjustable.30 transistors are used for the whole circuit.
关键词
不重叠时钟发生器/压控振荡器(VCO)/可调占空比/宽频率范围Key words
Non-overlapping clock generator/voltage controlled oscillator (VCO)/adjustable duty cycle/wide frequency range引用本文复制引用
出版年
2013
NETL
NSTL
维普
万方数据