一种高速低功耗BiCMOS脉冲式触发器的通用结构
A general structure for high-speed and low-power BiCMOS pulse-triggered flip-flops
赵祥红 1姚茂群2
作者信息
- 1. 浙江大学宁波理工学院信息科学与工程学院,浙江宁波315100
- 2. 杭州师范大学钱江学院,浙江杭州310012
- 折叠
摘要
BiCMOS电路兼具CMOS电路高集成度,低功耗的优点和双极型电路高速大驱动能力的优势,己成为目前国际学术界研究的热点之一.本文提出了一种基于BiCMOS工艺的新型脉冲式触发器的通用结构和设计方法,并设计了两种结构简单的BiCMOS脉冲式D型触发器.应用TSMC 180nm工艺,采用HSPICE模拟表明:所设计的BiCMOS脉冲式D型触发器不仅具有正确的逻辑功能,而且具有高速低功耗大驱动能力的优点,与已有文献提出的BiCMOS D型触发器相比,功耗和PDP均有大幅度降低.
Abstract
BiCMOS Circuits which have both advantages of CMOS circuits and bipolar Circuits have been paid more and more attention.A novel general structure and design method for pulse-triggered flip-flops based on BiCMOS technique are proposed and two kinds of D flip-flops according to the structure are presented.The results carried out by Hspice using TSMC 180nm show the proposed circuits have correct logic functions and advantages of high speed,low power and strong drive ability.Compared with existing designs,the proposed BiCMOS pulse-triggered D flip-flops consume much less power and have much smaller PDP.
关键词
BiCMOS/脉冲式触发器/低功耗/通用结构Key words
BiCMOS/pulse-triggered flip-flop/low power/general structure引用本文复制引用
基金项目
国家自然科学基金(61271124)
国家自然科学基金(61071062)
宁波市自然科学基金(2011A610109)
出版年
2013
NETL
NSTL
维普
万方数据