一种高隔离度低损耗CMOS射频收发开关设计方法
A Design technique for high isolation and low insertion loss CMOS T/R switch
杨小峰 1郝跃1
作者信息
- 1. 西安电子科技大学微电子学院宽禁带半导体材料与器件教育部重点实验室,陕西西安710071
- 折叠
摘要
本文采用了LC并联谐振的办法设计了高性能的CMOS收发开关,由于消除了CMOS晶体管的寄生电容的影响,降低了开关电路的插入损耗、提高隔离性能.同时利用直流偏置和交流浮动技术来提高开关的功率容纳能力.采用TSMC0.35μm RF-CMOS工艺设计的收发开关,模拟结果表明谐振频率工作点的插入损耗为1.03dB,收发端隔离39.277dB,输入ldB压缩点(PldB)功率26.28dBm.
Abstract
LC shunt resonance technology is used to fabricate the CMOS transmit/receive switch.High isolation and low insertion loss performance are achieved with the elimination of CMOS transistor's parasitical capacitance.DC bias voltage and AC-floating techniques are used to improve the power handling capability.The T/R Switch is based on the TSMC 0.35 μm RFCMOS process.The simulation exhibits that the insertion loss is 1.03dB,the isolation between transmit and receive access is 39.277 dB at the resonance frequency,and the input ldB compression point (PldB) is 26.28 dBm.
关键词
CMOS/收发开关/LC谐振/插入损耗/隔离度Key words
CMOS/transmit/receive switch/LC resonance/insertion loss/isolation引用本文复制引用
出版年
2013
NETL
NSTL
维普
万方数据