Parallel simulation model of no time-delay decoupling for power electronic converter
To improve the precision of the traditional one-step delayed decoupling model,a parallel simulation model for power electronic converters without delayed decoupling is proposed.In the prediction step,a 3/2 step is employed to predict the decoupling interface state quantities.In the correction step,the middle rectangle inte-gral is utilized to discretize the non-diagonal variable derivative part of the system state matrix and the state quantity product matrix.A decoupling form with a 1/2 time-delay is constructed,and the parallel simulation model of the no-delay decoupling is derived.The numerical stability domains of the proposed model are ana-lyzed and compared with those of the traditional one-step time-delay decoupling model.Finally,the proposed model is verified by means of simulation and physical experiment prototype.The results demonstrate that the proposed model exhibits the characteristics of constant conductivity,high accuracy and parallelism.The maxi-mum relative error between the simulation results of the proposed model and those of the reference model is less than 5％at a large simulation time-step.The proportions of the hardware resources occupied by the look-up ta-bles(LUTs)and digital signal processors(DSPs)on the field-programmable gate array(FPGA)board are 8.2％and 6.5％,respectively.The real-time simulation with a 280 ns simulation time-step can be achieved.
万方数据
维普
