首页|片式薄膜功率电感的感值建模与结构分析

片式薄膜功率电感的感值建模与结构分析

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随着便携式电子产品的轻薄化和小型化发展,电源模块也朝着小型化发展,所以对电源模块中体积最大的磁性元件电感进行建模设计就显得尤为重要.针对片式电感器的薄膜电感,首先应用磁场分割法,建立磁路模型,计算其感量;接着,进一步分析各磁阻的磁场大小,推出简易的磁场表达式,代入用多项式拟合后的磁导率曲线,对电感直流叠加特性进行研究;并且分析了当设计某目标感值时,匝数和电阻的关系,得出了在最优匝数下的磁芯高度占比范围在59%左右;最后运用有限元仿真软件验证了该模型的精确性和实用性,当磁芯高度占比在54.74%~63.16%时,误差范围为-1.97%~0.31%,当磁芯高度在59%左右时,饱和电流求解误差在4.28%以内.
Inductance Modelling and Structural Analysis of Chip Thin-Film Power Inductors
With the development of miniaturization of portable electronic products,the power module is also devel-oping towards miniaturization,so it is particularly important to model and design the largest magnetic component in-ductor in the power module.For the thin-film inductors in chip inductors,the magnetic circuit model is established and the inductance is calculated by using the magnetic field division method.Then,the magnetic field of each reluc-tance was further analyzed,and the simple magnetic field expression is derived.The DC superposition characteristics of inductors are studied by substituting the permeability curve fitted by polynomial;The relationship between the number of turns and the resistance is analyzed when a target inductance value is designed,and it is concluded that the ratio of the magnetic core height under the optimal number of turns is about 59%;Finally,the accuracy and practicability of the model are verified by the finite element simulation software.When the core height ratio is 54.74%~63.16%,the error range is-1.97%~0.31%,and when the core height ratio is about 59%,the satura-tion current error is less than 4.28%.

chip inductorthin-film inductormagnetic-field divisionDC superposition characteristic

张聪、徐玉珍

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福州大学电气工程与自动化学院,福建 福州 350108

片式电感 薄膜电感 磁场分割法 直流叠加特性

2024

电气开关
沈阳电气传动研究所

电气开关

影响因子:0.281
ISSN:1004-289X
年,卷(期):2024.62(1)
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