As the service environment of power semiconductor devices becomes more and more severe, the third-generation semiconductor represented by silicon carbide(SiC) has become the mainstream of industry applications owing to its excellent high-temperature performance. However, the lack of bounding materials which not only match with SiC chips but also have a low cost and a high melting point has become a bottleneck in the development of the industry. Cu-Sn intermetallic compounds(IMCs) are considered to be ideal bounding materials for SiC chips because of their low cost, good conductivity and characteristics that meet the requirements of low-temperature bonding and high-temperature service. Aimed at the power semiconductor device packaging, the preparation and reliability of Cu-Sn full IMC joints at home and abroad in recent years are analyzed and reviewed, and the problems to be solved at present and the development trend in the future are discussed.
关键词
功率器件封装/全金属间化合物/制备工艺/可靠性
Key words
Power device packaging/full intermetallic compound(IMC)/preparation process/reliability
维普
万方数据