A novel low delay and low power consumption low-to-high level shift circuit with a logic correction function is proposed,which uses a low delay level shift circuit and a low power consumption level shift circuit to work in parallel.After the logic is corrected,the low level between 1 V and 1.5 V is converted to a high level of 5 V,so this circuit can be widely applied in GaN driver circuits.Based on the 0.5 μm BCD process,1.5 V power supply low voltage and 5 V power supply high voltage,the circuit is verified at 5 MHz.Results show that although the layout area of this circuit increases as a whole,the rise and fall delays are reduced to 2.3 ns and 1.8 ns,respectively,with a total power consumption current of only 11 μA.
关键词
高电平移位/逻辑校正/低功耗/低延时/GaN驱动
Key words
High-level shift/logic correction/low power consumption/low delay/GaN driver
维普
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