基于ADRV9009的雷达干扰系统设计

Design of Radar Jamming System Based on ADRV9009

王贤铧 ¹孙全 ²常诚 ¹余科 ³董阳阳 ¹赵成义⁴

扫码查看

作者信息

1. 西安电子科技大学电子工程学院,西安 710126
2. 南京航空航天大学航天学院,南京 211106;上海机电工程研究所,上海 201109
3. 上海机电工程研究所,上海 201109
4. 中国电子科技集团公司第二十九研究所,成都 610036
折叠

摘要

如何快速高效地实现高灵活性、高集成度、可配置性好、低成本且易于维护的雷达干扰系统是当前雷达对抗领域的研究重点.针对以上需求,采用高集成度宽带射频收发器AD-RV9009 和FPGA芯片XC7Z100 来设计雷达干扰系统,实现从射频到基带的全链路信号收发,提高了系统的集成度.通过串口通信对雷达干扰参数进行实时配置,提高了雷达干扰系统的灵活性和可配置性.采用System Generator开发工具对雷达干扰系统进行层次化、模块化设计,缩短了系统开发周期,提高了系统的可维护性.

Abstract

How to quickly and efficiently achieve a radar jamming system with high flexibility,high integration,good configurability,low cost,and easy maintenance is the current research fo-cus in the field of radar countermeasures.In response to the above requirements,a high integra-tion broadband RF transceiver ADRV9009 and FPGA chip XC7Z100 are used to design a radar jamming system,achieving full link signal transmission and reception from RF to baseband,im-proving the system's integration level.Serial communication is used to control real-time configu-ration of radar jamming parameters,which improves the flexibility and configurability of the radar jamming system.The System Generator development tool is used to develop radar jamming sys-tems,which can shorten system development cycle and improve system maintainability.

关键词

高灵活性/雷达干扰系统/ADRV9009/FPGA/System/Generator

Key words

high flexibility/radar jamming system/ADRV9009/FPGA/System Generator

引用本文复制引用

出版年

2025

电子信息对抗技术

中国电子科技集团公司第29研究所信息综合控制国家重点实验室

电子信息对抗技术

影响因子：0.476

ISSN：1674-2230

段落导航