Analysis of GaN HEMT Bulk Trap Effect Based on Semi Insulating SiC Substrate
This paper describes the use of back gate testing to characterize the volume trap effect of GaN on SiC HEMT,which exhibits a two-stage characteristic corresponding to the pressurization process of the Ⅲ nitride buffer layer and semi insulating SiC substrate.In addition,a corresponding physical model is built on the Silvaco TCAD platform to simulate the volume trap effect and potential distribution under different substrate voltages.
GaN HEMTssemi insulating SiC substratesback gate testingvolume trap effect modelingcurrent collapseepitaxial optimization