This paper explains various power optimization schemes from RTL design to backend implementation by analyzing the causes of power consumption,and combines the above optimization methods with an actual chip design to verify the effectiveness of various schemes.It can combine different designs and choose different power optimization combination schemes to achieve lower power consumption without affecting performance.
关键词
集成电路/静态功耗/动态功耗/IR-Drop/电源域/门控单元/时钟门控/数据门控
Key words
integrated circuit/static power consumption/dynamic power consumption/IR Drop/power domain/gating unit/clock gating/data gating
维普
万方数据