首页|SerDes链路协同仿真与无源链路优化设计

SerDes链路协同仿真与无源链路优化设计

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随着SerDes链路信号传输速率的提升,信道链路经过芯片封装和印刷电路板过孔、AC电容和连接器等,会导致信号完整性(Signal Integrity,SI)挑战进一步增大.提出基于SerDes 32 Gbps-NRZ信道传输系统,优化无源信道中的BGA过孔、AC耦合电容焊盘、FMC连接器(FPGA Mezzanine Card Connector)处Pin脚设计,提升了通道阻抗的一致性,建立了更为准确的无源链路通道模型,并结合芯片有源IBIS-AMI模型,对比分析优化前后链路信道对眼图的影响,保证了 32 Gbps-NRZ高速信号的稳定传输.
SerDes link co-simulation and passive link optimization design
As the signal transmission rate of the SerDes link increases,the signal integrity(SI)challenge increases further as the channel link passes through PKG and PCB boards,through holes,AC capacitors and connectors.This paper provides a transmis-sion system based on SerDes 32 Gbps-NRZ channel,optimizes the design of BGA holes in passive channels,AC coupling capaci-tor pad,and Pin pins of FMC connectors,improves the impedance consistency in channels,and establishes a more accurate pas-sive link channel model,combined with the active IBIS-AMI model of the chip,the influence of the optimized channel on the eye image is compared and analyzed,which ensures the stable transmission of 32 Gbps-NRZ high-speed signal.

SerDespassive link analysiseye image simulationIBIS-AMI model

杜审言、付雷雷

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高澈科技(上海)有限公司,上海 200120

SerDes 无源链路分析 眼图仿真 IBIS-AMI模型

2025

电子技术应用
华北计算机系统工程研究所(中国电子信息产业集团有限公司第六研究所)

电子技术应用

影响因子:0.567
ISSN:0258-7998
年,卷(期):2025.51(1)