首页|基于相关性分离的逻辑电路敏感门定位算法

基于相关性分离的逻辑电路敏感门定位算法

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随着CMOS器件特征尺寸进入纳米量级,因高能粒子辐射等造成的电路失效问题日益严重,给电路可靠性带来严峻挑战.现阶段,准确评估集成电路可靠性,并以此为依据对电路进行容错加固,以提高电路系统可靠性变得刻不容缓.然而,由于逻辑电路中存在大量扇出重汇聚结构,由此引发的信号相关性导致可靠性评估与敏感单元定位面临困难.该文提出一种基于相关性分离的逻辑电路敏感门定位算法.先将电路划分为多个独立电路结构(ICS);以ICS为基本单元分析故障传播及信号相关性影响;再利用相关性分离后的电路模块和反向搜索算法精准定位逻辑电路敏感门单元;最后综合考虑面向输入向量空间的敏感门定位及针对性容错加固.实验结果表明,所提算法能准确、高效地定位逻辑电路敏感单元,适用于大规模及超大规模电路的可靠性评估与高效容错设计.
Critical Gates Localization of Logic Circuits Based on Correlation Separation
With the feature size of CMOS device entering the nanoscale,the circuit failure issue caused by high-energy particle radiation is becoming more and more serious,which brings severe challenges to the circuit reliability.At present,it is urgent to accurately evaluate the reliability of the integrated circuit and reinforce the fault tolerance of circuit,so as to improve the reliability of the circuit system.However,due to the large number of fan-out reconvergence structures in the logic circuit,the resulting signal correlation causes difficulties in reliability evaluation and critical gates location.This paper proposes critical gates location algorithm for logic circuit based on correlation separation.First,the circuit is divided into multiple Independent Circuit Structures(ICS);second,taking ICS as the basic unit to analyze fault propagation and signal correlation;Then,the circuit module after correlation separation and the reverse search algorithm is used to accurately locate the circuit critical gates;Finally,critical gates location and targeted fault tolerance reinforcement for the input vector space are comprehensively considered.The experimental results show that proposed algorithm can accurately and efficiently locate the critical gates of logic circuit,and it is suitable for reliability evaluation and efficient fault-tolerant design of large-scale and super-scale circuits.

Logic circuitFailureCorrelation separationCritical gate locationFault tolerant design

蔡烁、何辉煌、余飞、尹来容、刘洋

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长沙理工大学计算机与通信工程学院 长沙 410114

长沙理工大学汽车与机械工程学院 长沙 410114

中通服咨询设计研究院有限公司 南京 210019

逻辑电路 失效率 相关性分离 敏感门定位 容错设计

国家自然科学基金湖南省自然科学基金湖南省自然科学基金

621720582022JJ100522022JJ30624

2024

电子与信息学报
中国科学院电子学研究所 国家自然科学基金委员会信息科学部

电子与信息学报

CSTPCD北大核心
影响因子:1.302
ISSN:1009-5896
年,卷(期):2024.46(1)
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