A Design of On-chip Network with Self-adaptive Fault-Tolerant Link
As chip manufacturing has advanced to the sub-micro-nanometer scale,shrinking technology nodes are accelerating link failures in on-chip network,and the growth of failure links reduces the number of available routing paths and might lead to severe traffic congestion or even system crashes.The difficulty in maintaining the correctness of the on-chip system dramatically rises as the technology node shrinks.Previous schemes typically utilize deflection algorithms to bypass packets.However,they incur additional transmission latency due to hop count and raise the probability of deadlock.In order to achieve normal packet transmission when encountering faulty links,a self-Adaptive Fault-tolerant Link NoC design(AFL_NoC)is proposed,which redirects packets encountering a faulty link to another reversible link.The scheme contains a specific implementation of the reversible link and the associated distributed control protocol.The dynamic fault-tolerant link design fully utilizes the idle,available link and ensures that the network communication is not interrupted in case of link failures.Compared with the advanced fault-tolerant deflection routing algorithm QFCAR-W,AFL_NoC can reduce the average delay by 10%,the area overhead by 14.2%,and the power overhead by 9.3%.
万方数据
维普
