A high PSRR high stability low dropout linear regular(LDO)is proposed.High precision band gap reference circuit and error amplifier are designed,feed forward ripple elimination technology is used to design the power suppression ratio enhancement module,and the high frequency power supply rejection ratio(PSRR)is effectively improved.The proposed LDO circuit is simulated based on the CSMC 0.18 μm process,with a chip area of 150 μm×1 31 μm.This LDO has a stable output of 2.5 V voltage without temperature in-fluence at the input voltage range of 4.5 V～5.5 V,and at 1 mA light load,the power suppression ratio is-103.3 dB at low frequency and over-60 dB at 1 MHz.When the output capacitance is 2.2 μ F,the LDO circuit phase margin is 58.3° under light load and 64.1° under heavy load,with good system stability.
LDOhigh PSRRhigh stabilityfeed forward ripple elimination technologyband gap reference circuit
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