Design and Implementation of SVM Classifier Based on ZYNQ Platform
A new design of SVM classifier based on Xilinx HLS high-level synthesis tool is studied,and an underwater acoustic signal feature classification system is built on ZYNQ 7020 platform to test the designed SVM IP core.First,the SVM classification network is trained by using 500 groups of acoustic signal features on MATLAB.Then,the SVM classification algorithm is programmed in C lan-guage,and the IP core is generated by HLS synthesis.The experimental results show that the hardware acceleration system of SVM based on ZYNQ platform can classify the matrix of the underwater acoustic signal features,and the average time for classifying a section of underwater acoustic signal features with or without targets is 6.86 μs,which is only 1.1%of the time taken for the SVM algorithm run on MATLAB,while the classification accuracy can reach 99.31%.The resource consumption is only 10%of the total FPGA resources in ZYNQ 7020(4 347 LUTs).