Research on memory isolation mechanism of RISC-V architecture for power Internet of Things terminals
To address the issue of adding a memory isolation mechanism in the RISC-V architecture of power Internet of Things terminals,which increases terminal overhead and reduces performance,a memory isolation mechanism is designed for the RISC-V architecture of power Internet of Things terminals.Design a memory software and hardware isolation mechanism based on the RISC-V architecture instruction encoding format.Among them,the memory software isolation mechanism is the Mandatory access control mechanism and the Virtual memory mechanism to build a trusted memory isolation operating environment;The memory hardware isolation mechanism is the memory allocation mechanism for processor execution units.Through the joint application of memory software isolation and hardware isolation mentioned above,the memory isolation function of RISC-V architecture for power IoT terminals has been achieved.The experimental data shows that under different experimental conditions,the memory allocation results of the RISC-V architecture application program obtained after the application of the design mechanism are consistent with the optimal results,and the minimum interference level during the application program operation is 4%,confirming that the design mechanism has a better application effect.
RISC-V architectureInternet of Things terminalsprocessorelectricity Internet of Thingsmemory isolation mechanism
万方数据
维普
