Due to its strong anti-irradiation and low power consumption,H-gate NMOS devices have become the fundamental device for partially-depleted silicon-on-insulator(PD-SOI)circuit design.However,the kink effect,manifested by obvious wraps of Ids-Vds curves at high drain voltage,will significantly affect the circuit properties and stabilities under certain conditions.Here,the mechanism of the Kink effect was analyzed for the H-gate NMOS devices using measured data and the TCAD software simulated data.Based on the 0.15 μm SOI process,quantitative analysis was performed on the Kink effect to understand the effects of the top silicon film thickness,trap concentration,gate size,temperature and total ionizing dose irradiation.The final results show that at high drain voltage high concentration holes will accumulate in the body of the NMOS devices,which leads to establishment of parasitic NPN triode and triggers the Kink effect.This work throws light on the Kink effect in the H-gate NMOS devices and suggests solution for suppressing the Kink effect in the PD-SOI circuit design.
万方数据
维普
