A programmable gain amplifier for analog front-end of a sensor
Based on the Huahong 0.18 μm CMOS process,a programmable gain amplifier(PGA)was designed for the analog front end of a sensor.A fully differential structure was adopted to suppress the common mode noise of the sensor output,the DC component and the noise of the power supply.The circuit was composed of four parts,namely,a rail-to-rail input stage of an instrument amplifier structure,a rail-to-rail auto-zero fully differential operational amplifier,a digital control circuit,and a DC component elimination circuit.Meanwhile,continuous time auto-zero stabilization technology was used to reduce its input offset voltage.The amplification factor of the PGA is 5 bit adjustable with a total of 12 gears,which amplify 1,2,4,8,…,1024,2048 times respectively.The input and output swing of the PGA is between 0.2 V and 3.1 V at 3.3 V power supply.At 500 mV DC input,the DC component can be suppressed to 47.6 μV from-40 ℃ to 125 ℃.The circuit design,layout drawing and simulation verification were carried out through Virtuoso software.Monte Carlo simulations show that the average power supply rejection ratio and the common mode rejection ratio at 1 kHz are about 110.3 dB and 116.1 dB respectively,and the lσ value of the input offset voltage is about 21.3 µV.
programmable gain amplifierinput and output rangeauto-zero calibrationpower supply rejection ratiocommon mode rejection ratio
万方数据
维普
