A low-dropout regulator(LDO)was designed with fast transient response and 100 mA load current output capability,which consumes only 1.34 μA static current.The LDO circuit used the zero-pole tracking compensation technology combined with pseudo-equivalent series resistance(pseudo ESR)compensation technology to achieve loop stability in the full load range.It replaces the traditional LDO compensation method that relies on the ESR of the external capacitor to generate zero points,and it reduces the impact of temperature and technology on the compensation zero points,and it also reduces the difficulty of selecting external capacitors.In addition,a class-AB voltage buffer structure was added to the loop,which improves the transient response characteristics under low static current conditions.This design was based on the SMIC 65 nm process,which was verified by simulation.When the load current switches from 10 mA to 100 mA within 0.1 μs using 3 μF ceramic output capacitor,the output undershoot voltage is 42 mV,and the output overshoot voltage is 12 mV.The phase margin is above 60°within the full load range.
关键词
低静态电流/零极点追踪补偿/伪等效串联电阻补偿/class-AB电压缓冲器/低压差线性稳压器
Key words
low quiescent current/pole-zero tracking compensation/pseudo ESR compensation/class-AB voltage buffer/low-dropout regulator(LDO)
维普
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