Research on SFDR Optimization Technology of ADC in RFSoC
Xilinx has launched an radio-frequency system-on-chip (RFSoC) that integrates high-performance ADC/DAC.Due to its extremely high ADC performance indicators and system integration,it has been widely used.The ADC uses time-interleaved (TI) sampling technology,which combines multiple sub-ADCs to increase the sampling rate.However,due to the fact that the sub-ADCs cannot be made of the same process,there is a mismatch of offset,gain,and time,which causes spectrum spurs and reduces the spurious-free dynamic range (SFDR) index.Based on the spurious issues of ADC in RFSoC,the calibration structure of ADC is analyzed,and the technical methods for optimizing the SFDR index are explored.Numerous experiment and analysis results show that this method effectively improves the SFDR index of ADC and has good results.
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