首页|Design and implementation of dual-mode configurable memory architecture for CNN accelerator

Design and implementation of dual-mode configurable memory architecture for CNN accelerator

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  • 国家科技期刊平台
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With the rapid development of deep learning algorithms,the computational complexity and functional diversity are increasing rapidly.However,the gap between high computational density and insufficient memory bandwidth under the traditional von Neumann architecture is getting worse.Analyzing the algorithmic characteristics of convolutional neural network(CNN),it is found that the access characteristics of convolution(CONV)and fully connected(FC)operations are very differ-ent.Based on this feature,a dual-mode reconfigurable distributed memory architecture for CNN ac-celerator is designed.It can be configured in Bank mode or first input first output(FIFO)mode to accommodate the access needs of different operations.At the same time,a programmable memory control unit is designed,which can effectively control the dual-mode configurable distributed memory architecture by using customized special accessing instructions and reduce the data accessing delay.The proposed architecture is verified and tested by parallel implementation of some CNN algorithms.The experimental results show that the peak bandwidth can reach 13.44 GB·s-1 at an operating frequency of 120 MHz.This work can achieve 1.40,1.12,2.80 and 4.70 times the peak band-width compared with the existing work.

distributed memory structureneural network acceleratorreconfigurable array processorconfigurable memory structure

山蕊、LI Xiaoshuo、GAO Xu、HUO Ziqing

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School of Electronic Engineering,Xi'an University of Posts and Telecommunications,Xi'an 710121,P.R.China

国家重点研发计划国家自然科学基金国家自然科学基金Education Department of Shaanxi ProvinceShaanxi Provincial Key Research and Development Plan

2022ZD0119001618340056180230422JY0602024GX-YBXM-100

2024

10.3772/j.issn.1006-6748.2024.02.012

高技术通讯(英文版)
中国科学技术信息研究所（ISTIC）

高技术通讯(英文版)

影响因子：0.058
ISSN：1006-6748
年,卷(期)：2024.30(2)
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