Research on Frequency Synthesis Method Based on DDS+PLL
In response to the boundary spurious problem caused by traditional PLL during fractional division,DDS is used as the reference clock of PLL.By dynamically adjusting the output frequency of DDS and the integer division ratio of PLL,PLL still has small step synthesis frequency accuracy in integer division mode.The feasibility of the scheme has been verified through theoretical analysis and practical experiments.The practical experiments have shown that using DDS+PLL scheme to synthesize frequency can effectively solve integer boundary noise and achieve a maximum frequency stepping accuracy of 9.31 Hz.
decimal frequency divisionboundary dispersionDDS incentive PLLsmall stepsfrequency accuracy
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