Research on Low Porosity Underfill Process Technology of Silicon-based Chip
This paper takes the silicon-based chip of the receiving array for phased array antennas as the research object,the underfill technology of silicon-based chip is studied from the aspects of selection of dispensing needles、flip chip cleaning and underfill glue allocation mode,the appearance、void ratio of silicon-based chip and electrical performance of receiving array are tested,the results show that there are not cracking and hole in the adhesive layer edge of silicon-based chip which is underfilled by using appropriate dispensing nozzle、selecting appropriate cleaning conditions and using appropriate underfill glue allocation mode,the height of the underfill glue is about two-thirds of the the chip thickness,the total void rate of silicon-based chip is less than 10％,the single void rate of silicon-based chip is less than 2％,the gain decrease of the receiving array is less than or equal to 2 dB after underfilling,the performance requirements of the receiving array are meeted.The application of underfill technology with low void rate for silicon-based chip of the receiving array is achieved.
万方数据
维普
