用于毫米波雷达频率源的四倍频器设计
Quadrupler Design for Millimeter-Wave Radar Frequency Source
王梓任 1杨煜 1黄宇欣 1沈啸伟 1陈奇超 1高海军1
作者信息
- 1. 杭州电子科技大学射频电路与系统教育部重点实验室,浙江 杭州 310018
- 折叠
摘要
基于 SMIC 55 nm CMOS工艺,设计了一款面向毫米波 FMCW雷达频率源的四倍频器.该四倍频器由相同拓扑结构的二倍频级联构成,二倍频核心采用 Push-Push 结构实现,采用磁耦合谐振器(MCR)实现输入阻抗匹配,同时实现单端转差分和抑制谐波的功能;论文同时提出了一种谐波抑制结构,运用带通结构结合 MCR完成级间匹配和输出功率匹配,满足抑制谐波和较高输出功率的要求.设计结果表明,在 60～64 GHz输出频率内,四倍频器饱和输出功率为 2.2 dBm,谐波抑制度大于 35 dBc,直流功耗 59 mW.该四倍频器在满足宽倍频器程的前提下,具有高谐波抑制度和高输出功率的特点,可用于毫米波雷达系统中的频率源产生电路.
Abstract
Based on the SMIC 55 nm CMOS process,a quadrupler is designed which is for the use of millimeter-wave FMCW radar frequency sources.The quadrupler consists of a cascaded topology of doubler stages with the doubler core utilizing the Push-Push topology.The magnetic-coupled resona-tors(MCR)for matching the input impedance while achieving single-ended to differential conversion and harmonic suppression functionalities.Meanwhile,a harmonic suppression structure is proposed,combining a bandpass structure with MCR to achieve inter-stage matching and output power matc-hing,meeting the requirements for harmonic suppression and higher output power.The design results demonstrate that within the output frequency range of 60 GHz～64 GHz,the quadrupler achieves a saturated output power of 2.2 dBm with harmonic suppression greater than 35 dBc and a DC power consumption of 59 mW.This quadrupler exhibits high harmonic suppression and high output power under the premise of satisfying the wide octave range,making it suitable for frequency source genera-tion circuits in millimeter-wave radar systems.
关键词
MCR/四倍频器/CMOS工艺/谐波抑制/毫米波/频率源Key words
MCR/Quadrupler/CMOS technology/Harmonic suppression/Millimeter-wave/Frequency source引用本文复制引用
出版年
2024
NETL
NSTL
万方数据