Design and Exception Handling Strategy of Cortex A15 Kernel System Based on Keystone II Architecture
This paper expounds the Cortex A15 kernel of high-performance SOC TMS320C66AK2H,and implements a system exception handling mechanism using the Cortex A15 kernel interrupt controller(GIC 400)and SOC interrupt handling controller(CIC2),which can accurately and quickly locate the errors in system operation.Taking the Cortex A15 kernel as an example of illegally accessing shared memory MSMC using the EDMA3 module,it verifies the feasibility of the system's exception handling mechanism and has been tested to be accurate and effective.
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维普
