集成电路应用2024,Vol.41Issue(3) :30-32.DOI:10.19339/j.issn.1674-2583.2024.03.012

一种校准线延时差异的方法分析

Analysis of a Method for Measuring Delay Differences in Calibration Lines

刘文江 杨超 曲狄
集成电路应用2024,Vol.41Issue(3) :30-32.DOI:10.19339/j.issn.1674-2583.2024.03.012

一种校准线延时差异的方法分析

Analysis of a Method for Measuring Delay Differences in Calibration Lines

刘文江 1杨超 1曲狄1
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作者信息

  • 1. 上海富瀚微电子股份有限公司,上海 200233
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摘要

阐述一种在发送端通过自发自收的方式自动校准并行数据不同PIN延时的方法,可以有效提高接收芯片Clock和Data的相位裕度,降低因并行传输信号完整性指标较差,整个系统不稳定而出现花屏,闪屏的现象.

Abstract

This paper describes a method of automatically calibrating parallel data with different PIN delays through spontaneous self collection at the sending end,which can effectively improve the phase margin of the receiving chip Clock and Data,and reduce the phenomenon of screen flicker and flicker caused by poor integrity indicators of parallel transmission signals and instability of the entire system.

关键词

电路设计/BT656/BT1120/Skew校准

Key words

circuit design/BT656/BT1120/Skew calibration

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出版年

2024
集成电路应用
上海贝岭股份有限公司

集成电路应用

影响因子:0.132
ISSN:1674-2583
参考文献量7
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