Design and Implementation of LVDS Bus Controller Based on FPGA
In order to ensure that the operation status and transmission rate of LVDS bus meet the application requirements un-der high-speed and multi-load conditions,the LVDS bus controller is designed based on FPGA.The bus occupation mode and sig-nal transmission logic of LVDS are optimized in the protocol,and the bus structure and node interface are optimized in the physical layer.In order to prevent low voltage differential signal distortion and interface lock-out,signal coding and lock-out prevention mea-sures are taken to ensure signal stability and enhance the reliability of the bus.It is verified that the scheme can improve the load ca-pacity of the bus and maintain reliable transmission at high speed.
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维普
