With the progress of integrated circuit technology and design level,the scale and complexity of integrated circuit have been greatly increased,so it is difficult to meet the requirements of functional verification in chip development by using tradi-tional verification methods.Based on the UVM verification methodology,this paper studies the verification of bus bridge module in system-level chip.Firstly,the functional features and interface signals of the module are analyzed,and the UVM verification plat-form is built.Then,test-cases are written to test all functional points of the module,and the design is modified according to the test results.The regression test is carried out after all test cases passed.The regression test results showes that code coverage reached 98%and function coverage reached 100%,meeting the verification requirements.After this verification,the function of the module has been fully verified,and can be successfully applied to the on-chip interconnection of system-level chips.Meanwhile,the verifi-cation platform built in this time has certain universality and re-usability.
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