基于RISC-V内核的UHF RFID阅读器SoC设计
SoC of UHF RFID interrogator design based on RISC-V core
韩宇昕 1卜刚 1郭钰1
作者信息
- 1. 南京航空航天大学 电子信息工程学院,江苏 南京 211106
- 折叠
摘要
为降低RFID阅读器产品设计的难度和结构复杂度,设计一款符合ISO/IEC 18000-6C协议的RFID阅读器SoC.系统用硬件实现协议中对于阅读器要求的脉冲间隔码模块、循环冗余编码/校验模块、FM0码/Miller码解码模块等.(有歧义)选用开源RISC-V内核蜂鸟E203提供控制和用户可编程空间.编写基于FreeRTOS实时嵌入式操作系统的SoC配套软件.经过测试,该设计能够在FPGA芯片内正常运行,实现符合协议对阅读器通信要求的相关操作,能够支持二次开发实现除RFID通信外的其它操作.
Abstract
To reduce the difficulty and structural complexity of RFID reader product design,an RFID reader SoC was designed based on ISO/IEC 18000-6C protocol.The system implemented in hardware the pulse interval code module,cyclic redundancy coding/checking module,FM0 code/Miller code decoding module,etc.required by the protocol for the reader.The open source RISC-V core Hummingbird E203 was also selected to provide control and user programmable space.The SoC supporting soft-ware was written based on FreeRTOS real-time embedded operating system.After testing,the design is able to run normally in the FPGA chip to achieve the relevant operations in accordance with the protocol requirements for interrogator communication,and can support secondary development to achieve other operations in addition to RFID communication.
关键词
射频识别技术/RISC-V内核/阅读器/FPGA原型机/专用集成电路/片上系统/ICB总线Key words
RFID/RISC-V core/interrogator/FPGA prototype/ASIC/SoC/ICB bus引用本文复制引用
出版年
2024
NETL
NSTL
维普
万方数据