首页|CFP:A Coherence-Free Processor Design

CFP:A Coherence-Free Processor Design

扫码查看
This paper presents the design of a Coherence-Free Processor(CFP)that enables a scalable multiprocessor by eliminating cache coherence operations in both hardware and software.The CFP uses a coherence-free cache(CFC)that can improve the cost-effectiveness and performance-effectiveness of the existing multiprocessors for commonly used workloads.The CFC is feasible because not all program data that reside in a multiprocessor cache need to be accessed by other processors,and private caches at level 1(L1)and level 2(L2)facilitate this method of sharing.Reentrant programs are specifically designed to protect their data from modification by other tasks.Program data that are modified but not shared with other tasks do not require a coherence protocol.Adding processors reduces the multitasking queue,reducing elapsed time.Simultaneous execution replaces concurrent execution.

multiprocessormultitaskingcachecoherencesnoopy

杨光诺

展开 >

Mount Gilead,OH 43338,U.S.A.

2024

计算机科学技术学报(英文版)
中国计算机学会

计算机科学技术学报(英文版)

CSTPCD
影响因子:0.432
ISSN:1000-9000
年,卷(期):2024.39(1)
  • 2