基于RPU的TTI程序设计和分析方法
Design and Analysis Method of TTI Program Based on RPU
高银康 1陈香兰 1龚小航 1蒋滨泽 1李曦 1周学海1
作者信息
- 1. 中国科学技术大学计算机科学与技术学院 合肥 230027;中国科学技术大学苏州高等研究院 江苏苏州 215004
- 折叠
摘要
实时嵌入式系统不仅要保证计算结果的逻辑正确性,还要确保与外界交互的时序正确性,所以底层程序要能精确表达上层模型中的时间行为.TTI指令集(time-triggered instruction set)的提出尝试解决计算机指令集体系结构层次缺少时间语义的问题,并且基于TTI指令集实现的实时处理单元(real-time processing unit,RPU)证明了TTI指令集的可行性和有效性.但是目前的工作缺少对于TTI程序设计和分析方法的研究.所以,基于TTI指令集和RPU,提出了TTI指令集可以表达的 4种时间语义,给出了TTI程序的设计范式.并且构建了TTI程序时间行为的表示方法——TFG+,TFG+是对TFG的扩展,TFG+区分了TTI程序中时间语义指令和普通代码段,可以表示TTI程序的控制流信息、用户规定的时间行为和TTI程序平台相关的时间属性.最后,提出了TTI程序的时间分析方法以及时间安全性检查方法,为TTI程序的设计和部署提供了依据.
Abstract
Real-time embedded system(RTES)needs to guarantee not only logical correctness of the calculation results,but also temporal correctness of the interaction with outside world,so low-level programs must be able to accurately express time behavior in upper-level models.TTI instruction set(time-triggered instruction set)is proposed to try to solve the problem of the lack of timing semantics at the computer instruction set architecture level,and the realization of real-time processing unit(RPU)based on TTI instruction set proves the feasibility and effectiveness of TTI instruction set.However,the current work lacks research on design and analysis method of TTI program.Therefore,based on TTI instruction set and RPU,we propose four types of timing semantics that TTI instruction set can express,give the design paradigm of TTI program.Then,we define the representation of TTI program time behavior—TFG+,which is an extension of TFG.TFG+ distinguishes timing semantic instructions and the common code segments in the TTI program,and TFG+ can represent the control flow information of TTI program,the time behavior specified by the user,and the time attributes related to hardware platform.Finally,we propose time analysis method of TTI program and time safety checking method,which provide the basis for the design and deployment of TTI program.
关键词
实时嵌入式系统/时间可预测性/时间语义指令集/实时处理器/WCET分析Key words
real-time embedded system(RTES)/timing predictability/timed instruction set/real-time processor/WCET analysis引用本文复制引用
基金项目
国家重点研发计划(2017YFA0700900)
国家自然科学基金(62102383)
出版年
2024
NETL
NSTL
万方数据