DESIGN OF FPGA SPEECH EMOTION RECOGNITION SYSTEM BASED ON NEURAL NETWORK ACCELERATOR
乔栋 1陈章进 2邓良 1张廓1
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作者信息
1. 上海大学微电子研究与开发中心 上海 200444
2. 上海大学微电子研究与开发中心 上海 200444;上海大学计算中心 上海 200444
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摘要
针对现有语音情感识别系统的部署功耗高、不具有便携性的缺点,提出一种基于神经网络加速器的FPGA语音情感识别系统设计.在FPGA上实现语音MFCC(Mel Frequency Cepstrum Coefficient)特征的提取,便于进行识别;为神经网络加速器设计指令生成算法,将网络模型部署在神经网络加速器实现语音情感识别.整个系统主要硬件资源消耗为37 078个LUT和153个DSP,支持在主流FPGA平台上的部署.经过检验,语音情感识别系统的指令运算误差可达0.06以下,输出误差为0.0004以下,满足语音情感识别的需求.
Abstract
Aiming at the disadvantages of high-power consumption and no portability in the deployment of existing speech emotion recognition system,this paper proposes a design of FPGA speech emotion recognition system based on neural network accelerator.Mel frequency cepstrum coefficient(MFCC)feature extraction of speech was realized on FPGA,which was convenient for recognition.The instruction generation algorithm was designed for the neural network accelerator,and the network model was deployed in the neural network accelerator to realize speech emotion recognition.The main hardware resource consumption of the whole system is 37 078 LUTs and 153 DSPs,which supports the deployment on the mainstream FPGA platform.After testing,the instruction operation error of speech emotion recognition system is less than 0.06,and the output error is less than 0.000 4,which meets the needs of speech emotion recognition.
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