A design of 2.4 GHz low-power consumption and low-noise RF receiver front-end circuit
According to the technical requirements of wireless communication,this paper designs a low-pow-er consumption,low-noise RF receiver front-end circuit operating at 2.4 GHz.A low-noise amplifier(LNA)with dynamic clamping and transconductance enhancement techniques is utilized to reduce power consumption while maintaining high gain and stability,thereby avoiding the problem of circuit performance degradation under pro-cess,voltage and temperature(PVT).Additionally,a two-stage feedforward compensated operational transconduc-tance amplifier(OTA)is employed to extend the bandwidth effectively,and ensure that the transimpedance ampli-fier(TIA)maintains low input impedance at high frequencies,thus reducing the noise of overall circuit.The lay-out simulation results show that at a baseband frequency of 1 MHz and a supply voltage of 1V,the proposed de-sign of circuit achieves a conversion gain of 40 dB,an input match of-15 dB,a double-sideband noise figure(NF)of 4.9 dB,a third-order input intermodulation point(IIP3)more than-24 dBm,and a total quiescent power con-sumption of 3.6 mW.
2.4 GHz RF receiverreceiver front-endlow power consumptionlow noise
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维普
