The paper presented an optimization of a memristor-based ternary logic circuit,in order to address the problems of multiple cascaded gates of memristor in combinational logic circuits,which lead to degraded output signal and logic result errors,the design of buffer used memristor as a dominate devices,which had significantly improved the logic circuit results.The proposed buffer with a ternary data com-parator,multiplier,subtractor and encoder was verified by LTspice,which output signal of the improved circuit was about 2 V at the high level and 0 at low level.The results provide new ideas in the future study of complex logic operations,large-scale memristor ternary and multiple-value circuits design.
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