Resource Optimization Method Based on CPU-FPGA Hybrid Step Size Real-Time Simulation
With the integration of a large number of high-frequency power electronic devices into the power grid system,CPU based real-time simulators are difficult to achieve smaller step size simulation calculations due to serial computing reasons.Therefore,a field programmable gate array(FPGA)based simulation method is adopted,the mixed step simulation of FPGA and CPU has gradu-ally become a research hotspot.However,the resource consumption of FPGA has become a limiting factor for simulation scale in power systems with a large number of distributed power sources.A resource optimization scheme suitable for CPU-FPGA joint real-time simulation is proposed to address this issue,and a transient joint real-time simulation platform for power systems is built.Taking the double-fed wind power system as an example,the entire system is divided into CPU and FPGA parts,with asynchronous com-munication between the two parts using Gigabit Ethernet.The optimized simulation process is used within the FPGA part to reduce the usage of hardware resources.Finally,by comparing real-time simulation results with Simulink offline simulation and traditional simulation models,it is proven that adopting this approach can effectively reduce the consumption of FPGA resources while ensuring simulation accuracy.
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