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基于Python脚本的SoC寄存器模块自动化设计

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片上系统芯片(SoC)包含大量可通过系统总线配置的寄存器模块.在芯片设计流程中,需要人工设计寄存器模块功能,并形成可阅读的设计文档,再由硬件描述语言(Hardware Description Language)描述为实际数字电路,还需要有便于芯片仿真验证的寄存器模型以及基于C语言的嵌入式固件程序用于应用软件开发.本文提供一种基于Python脚本语言的芯片设计流程,将上述芯片设计流程串联起来,做到一次规格设计,自动化输出寄存器模块的不同设计描述,有效提高了SoC芯片设计效率.
Automation Design of SoC Register Module Based on Python Script
System on Chip(SoC)contains a large number of register modules that can be configured through the system bus.In the chip design process,it is necessary to manually design register module functions and form readable design documents,which are then described by Hardware Description Language as actual digital circuits.In addition,there is a need for register models that are convenient for chip simulation verification and embedded firmware programs based on C language for application software development.This article provides a chip design process based on Python scripting language,which connects the chip design process to achieve a single specification design and automate the different design descriptions of output register modules,effectively improving the efficiency of SoC chip design.

SoC chipregister designAMBA busAPB interfacePython script

周国飞

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超睿科技(上海)有限公司,上海 200000

SoC芯片 寄存器设计 AMBA总线 APB接口 Python脚本

2024

软件
中国电子学会 天津电子学会

软件

影响因子:1.51
ISSN:1003-6970
年,卷(期):2024.45(5)
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