Area optimization for MPRM circuits based on AMSChOA
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为解决现有基于同或/或(XNOR/OR)的混合极性Reed-Muller(mixed polarity Reed-Muller,MPRM)电路面积优化方法中存在的收敛速度较慢、不容易跳出局部最优等问题,提出一种基于自适应多策略选择黑猩猩优化算法(adaptive multi-strategy selection chimp optimization algorithm,AMSChOA)的MPRM电路面积优化方法.AMSChOA使用柯西变异、螺旋搜索、随机搜索和翻筋斗策略在 4 个最优黑猩猩附近进行搜索,扩大算法的搜索范围.针对其他黑猩猩个体加入动态学习因子策略,动态学习 4 个最优黑猩猩位置,加快算法跳出局部最优.利用提出的AMSChOA对基于XNOR/OR的MPRM电路进行面积优化,搜索电路面积最小时对应的 MPRM 电路.基于北卡罗来纳微电子中心(Microelectronics Center of North Carolina,MCNC)基准测试电路的试验结果表明,本研究提出的方法有效,与基于传统黑猩猩优化算法、粒子群算法、改进粒子群算法的MPRM电路面积优化方法相比,最高面积优化率为 68.09%,平均优化率为 41.24%.
To solve the problems of slow convergence speed and not easy to jump out of local optimum in the existing XNOR/OR based mixed polarity Reed-Muller(MPRM)circuit area optimization approaches,an approach based on adaptive multi-strategy selection chimp optimization algorithm(AMSChOA)was proposed.AMSChOA used the Cauchy variation,spiral search,random search,and somersault strategy to search in the vicinity of the four optimal chimps to expand the search range of the algorithm,and a dynamic learning factor strategy was added for other chimpanzee individuals to dynamically learn the four optimal chimpanzee locations to accelerate the algorithm to jump out of the local optimum.The proposed AMSChOA was used to optimize the area of the XNOR/OR-based MPRM circuits,and the MPRM circuits corresponding to the smallest circuit area were searched.The experimental results based on Microelectronics Center of North Carolina(MCNC)benchmark test circuits showed that the proposed approach in this study was effective,with a maximum area optimization rate of 68.09%and an average optimization rate of 41.24%,compared to the area optimization methods for MPRM circuits based on the traditional chimp optimization algorithm,particle swarm optimization,and modified particle swarm optimization.
area optimizationadaptive multi-strategy selection chimp optimization algorithmmixed polarity Reed-Mullerdynamic learning factorcombinatorial optimization problem
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